riscv/rocket-chip
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bug fix for nbdcache s2_data

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This commit is contained in:
Henry Cook 2014-09-25 11:59:19 -07:00
parent b55c38cdc7
commit 8eb64205f5
1 changed files with 1 additions and 1 deletions
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rocket/src/main/scala/nbdcache.scala
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@ -817,7 +817,7 @@ class HellaCache extends L1HellaCacheModule {
val regs = Vec.fill(rowWords){Reg(Bits(width = encDataBits))} val regs = Vec.fill(rowWords){Reg(Bits(width = encDataBits))}
val en1 = s1_clk_en && s1_tag_eq_way(w) val en1 = s1_clk_en && s1_tag_eq_way(w)
for (i <- 0 until regs.size) { for (i <- 0 until regs.size) {
val en = en1 && (Bool(i == 0 || !doNarrowRead) || s1_writeback) val en = en1 && ((Bool(i == 0) || !Bool(doNarrowRead)) || s1_writeback)
when (en) { regs(i) := data.io.resp(w) >> encDataBits*i } when (en) { regs(i) := data.io.resp(w) >> encDataBits*i }
} }
s2_data(w) := regs.toBits s2_data(w) := regs.toBits