riscv/rocket-chip
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Preserve WithRV32 behavior: FLEN = 32

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Andrew Waterman
2018-02-20 18:28:47 -08:00
parent 1dc1e2c099
commit 8998a97ea1
1 changed files with 1 additions and 0 deletions
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src/main/scala/coreplex/Configs.scala
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@@ -165,6 +165,7 @@ class WithRV32 extends Config((site, here, up) => {
case XLen => 32 case XLen => 32
case RocketTilesKey => up(RocketTilesKey, site) map { r => case RocketTilesKey => up(RocketTilesKey, site) map { r =>
r.copy(core = r.core.copy( r.copy(core = r.core.copy(
fpu = r.core.fpu.map(_.copy(fLen = 32)),
mulDiv = Some(MulDivParams(mulUnroll = 8)))) mulDiv = Some(MulDivParams(mulUnroll = 8))))
} }
}) })