riscv/rocket-chip
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removed bad mt test

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This commit is contained in:
Henry Cook 2013-06-14 00:14:18 -07:00
parent 85fbb650c9
commit 896179cbb6
4 changed files with 3 additions and 4 deletions
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1
Makefrag
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@ -537,7 +537,6 @@ al_vvadd.riscv\
am_matmul.riscv\ am_matmul.riscv\
am_vvadd.riscv\ am_vvadd.riscv\
an_matmul.riscv\ an_matmul.riscv\
an_vvadd.riscv\
ap_matmul.riscv\ ap_matmul.riscv\
ap_vvadd.riscv\ ap_vvadd.riscv\
aq_matmul.riscv\ aq_matmul.riscv\

2
emulator/Makefile
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@ -74,7 +74,7 @@ output:
mkdir -p $@ mkdir -p $@
output/%.run: output/%.hex emulator output/%.run: output/%.hex emulator
./emulator +dramsim +max-cycles=30000000 +coremap-random +loadmem=$< none 2> /dev/null ./emulator +dramsim +max-cycles=30000000 +loadmem=$< none 2> /dev/null
output/%.out: output/%.hex emulator output/%.out: output/%.hex emulator
./emulator +dramsim +max-cycles=30000000 +verbose +coremap-random +loadmem=$< none 2> $@ ./emulator +dramsim +max-cycles=30000000 +verbose +coremap-random +loadmem=$< none 2> $@

2
riscv-tests

@ -1 +1 @@
Subproject commit 60f056880ec6929c5f23af4d66aea0f0cb7b0245 Subproject commit c31d7c5eb4109fdcce58d27b132e20596ece2d07

2
src/main/scala/RocketChip.scala
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@ -416,7 +416,7 @@ class TopIO(htif_width: Int) extends Bundle {
} }
object DummyTopLevelConstants extends _root_.uncore.constants.CoherenceConfigConstants { object DummyTopLevelConstants extends _root_.uncore.constants.CoherenceConfigConstants {
val NTILES = 1 val NTILES = 2
val NBANKS = 1 val NBANKS = 1
val HTIF_WIDTH = 16 val HTIF_WIDTH = 16
val ENABLE_SHARING = true val ENABLE_SHARING = true