Exit from testbench, not C code
Otherwise, we don't get coverage data from the simulator.
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parent
4cd709c516
commit
87a4858aa6
@ -21,11 +21,6 @@ static const char* loadmem;
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static bool dramsim = false;
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static int memory_channel_mux_select = 0;
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void do_exit(vc_handle failure)
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{
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exit(vc_getScalar(failure));
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}
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int main(int argc, char** argv)
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{
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for (int i = 1; i < argc; i++)
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@ -41,6 +41,7 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
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-e vcs_main \
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$(RISCV)/lib/libfesvr.so \
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$(sim_dir)/libdramsim.a \
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-sverilog \
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+incdir+$(generated_dir) \
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+define+CLOCK_PERIOD=0.5 $(sim_vsrcs) $(sim_csrcs) \
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+define+PRINTF_COND=$(TB).printf_cond \
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@ -1,7 +1,5 @@
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// See LICENSE for license details.
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extern "A" void do_exit(input reg failure);
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extern "A" void debug_tick
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(
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output reg debug_req_valid,
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@ -159,7 +157,7 @@ module rocketTestHarness;
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begin
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$fdisplay(stderr, "*** FAILED *** (%s) after %d simulation cycles", reason, trace_count);
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`VCDPLUSCLOSE
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do_exit(1'b1);
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$fatal;
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end
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if (exit == 1)
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@ -167,7 +165,7 @@ module rocketTestHarness;
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if (verbose)
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$fdisplay(stderr, "Completed after %d simulation cycles", trace_count);
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`VCDPLUSCLOSE
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do_exit(1'b0);
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$finish;
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end
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end
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