riscv/rocket-chip
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Merge pull request #1250 from seldridge/add-jtag-vpi-c-vsim

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Add jtag_vpi.c to sources for vsim
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Henry Cook 2018-02-26 15:40:12 -07:00 committed by GitHub
commit 86c10b3cef
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1 changed files with 1 additions and 3 deletions
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4
vsim/Makefrag
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@ -5,7 +5,6 @@
# Verilog sources
bb_vsrcs = \
$(base_dir)/vsrc/jtag_vpi.v \
$(base_dir)/vsrc/plusarg_reader.v \
$(base_dir)/vsrc/ClockDivider2.v \
$(base_dir)/vsrc/ClockDivider3.v \
@ -24,7 +23,7 @@ sim_vsrcs = \
sim_csrcs = \
$(base_dir)/csrc/SimDTM.cc \
$(base_dir)/csrc/SimJTAG.cc \
$(base_dir)/csrc/remote_bitbang.cc \
$(base_dir)/csrc/remote_bitbang.cc
#--------------------------------------------------------------------
# Build Verilog
@ -59,7 +58,6 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
+libext+.v \
VCS_OPTS += +vpi
VCS_OPTS += -P $(base_dir)/vsrc/jtag_vpi.tab
VCS_OPTS += -CC "-DVCS_VPI"