riscv/rocket-chip
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coreplex => subsystem

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Henry Cook committed 2018-02-21 14:42:24 -08:00
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commit 8462ea3d5b
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src/main/scala/amba/axi4/AsyncCrossing.scala
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@@ -7,7 +7,7 @@ import freechips.rocketchip.config.Parameters
import freechips.rocketchip.diplomacy._
import freechips.rocketchip.tilelink._
import freechips.rocketchip.util._
import freechips.rocketchip.coreplex.{CrossingWrapper, AsynchronousCrossing}
import freechips.rocketchip.subsystem.{CrossingWrapper, AsynchronousCrossing}
class AXI4AsyncCrossingSource(sync: Int = 3)(implicit p: Parameters) extends LazyModule
{