riscv/rocket-chip
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add LR/SC

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This commit is contained in:
Andrew Waterman 2013-04-07 19:35:51 -07:00
parent c6b56c5f25
commit 7ea782fd22
3 changed files with 3 additions and 2 deletions
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1
Makefrag
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@ -20,6 +20,7 @@ libdramsim.a: $(DRAMSIM_OBJS)
global_tstdir = $(basedir)/riscv-asmtests-bmarks/riscv-tests global_tstdir = $(basedir)/riscv-asmtests-bmarks/riscv-tests
global_asm_tests = \ global_asm_tests = \
riscv_ipi \ riscv_ipi \
riscv_lrsc \
riscv_add \ riscv_add \
riscv_addi \ riscv_addi \
riscv_amoadd_d \ riscv_amoadd_d \

2
riscv-rocket

@ -1 +1 @@
Subproject commit b9e6abf3defd2c54a990dfca0417bfc704fefd3d Subproject commit 31a4ad984cffb3c441e4b30a4c9060743f3295a8

2
uncore

@ -1 +1 @@
Subproject commit 1f89e568acf9bed6a1d4ccf1c96ae79370a58225 Subproject commit ccc4badd15c6f88a4af5d97e8c0fcd105baf43fa