riscv/rocket-chip
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reduce number of outstanding transactions

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This commit is contained in:
Andrew Waterman 2012-07-26 14:51:41 -07:00
parent 9c50621a19
commit 7778802395
1 changed files with 2 additions and 2 deletions
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4
rocket/src/main/scala/consts.scala
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@ -195,8 +195,8 @@ object Constants
val COHERENCE_DATA_BITS = (1 << OFFSET_BITS)*8
val TILE_ID_BITS = log2Up(NTILES)+1
val TILE_XACT_ID_BITS = log2Up(NMSHR)+3
val GLOBAL_XACT_ID_BITS = log2Up(NTILES*NMSHR)+1
val NGLOBAL_XACTS = 1 << GLOBAL_XACT_ID_BITS
val NGLOBAL_XACTS = 8
val GLOBAL_XACT_ID_BITS = log2Up(NGLOBAL_XACTS)
val X_INIT_TYPE_MAX_BITS = 2
val X_REP_TYPE_MAX_BITS = 3