AccumulatorExample now properly sets its busy bit. Also, pepper some helpful comments into AccumulatorExample
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		@@ -95,16 +95,21 @@ class AccumulatorExample(conf: RocketConfiguration) extends RoCC(conf)
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  cmd.ready := !stallReg && !stallLoad && !stallResp
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    // command resolved if no stalls AND not issuing a load that will need a request
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    // note, loadSent = true will occur when the load response comes back
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  // PROC RESPONSE INTERFACE
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  io.resp.valid := cmd.valid && doResp && !stallReg && !stallLoad
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    // valid response if valid command, need a response, and no stalls
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  io.resp.bits.rd := cmd.bits.inst.rd
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  io.resp.bits.data := accum // Semantics is to always send out prior accumulator register value
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    // Must respond with the appropriate tag or undefined behavior
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  io.resp.bits.data := accum
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    // Semantics is to always send out prior accumulator register value
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  io.busy := Bool(false)
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  io.busy := cmd.valid || busy.reduce(_||_)
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    // Be busy when have pending memory requests or committed possibility of pending requests
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  io.interrupt := Bool(false)
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    // Set this true to trigger an interrupt on the processor (please refer to supervisor documentation)
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  // MEMORY REQUEST INTERFACE
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  io.mem.req.valid := cmd.valid && doLoad && !stallReg && !stallResp
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  io.mem.req.bits.addr := addend
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  io.mem.req.bits.tag := addr
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