riscv/rocket-chip
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Make RocketTileWrapper a BaseTile

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Andrew Waterman
2017-10-05 22:46:16 -07:00
parent 4645b61fd3
commit 71205b70cc
2 changed files with 8 additions and 9 deletions
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src/main/scala/coreplex/RocketCoreplex.scala
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@ -36,7 +36,7 @@ trait HasRocketTiles extends HasSystemBus
// Make a wrapper for each tile that will wire it to coreplex devices and crossbars,
// according to the specified type of clock crossing.
val wiringTuple = localIntNodes.zip(tileParams)
val rocket_tiles: Seq[RocketTileWrapper] = wiringTuple.map { case (lip, tp) =>
val rocket_tiles: Seq[BaseTile] = wiringTuple.map { case (lip, tp) =>
val pWithExtra = p.alterPartial {
case TileKey => tp
case BuildRoCC => tp.rocc