riscv/rocket-chip
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test_mode_reset: use a cleaner interface with bundles and options instead of individual signals

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Megan Wachs
2017-09-15 12:30:39 -07:00
parent ffc514d1bc
commit 6cda4504ac
4 changed files with 18 additions and 21 deletions
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4
src/main/scala/devices/debug/Periphery.scala
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@ -57,7 +57,7 @@ trait HasPeripheryDebugModuleImp extends LazyMultiIOModuleImp with HasPeripheryD
val dtm = debug.systemjtag.map { sj =>
val psd = debug.psd.getOrElse(Wire(init = new PSDTestModeIO().fromBits(0.U)))
val psd = debug.psd.getOrElse(Wire(init = new PSDTestMode().fromBits(0.U)))
val dtm = Module(new DebugTransportModuleJTAG(p(DebugModuleParams).nDMIAddrSize, p(JtagDTMKey)))
dtm.io.jtag <> sj.jtag
@ -71,7 +71,7 @@ trait HasPeripheryDebugModuleImp extends LazyMultiIOModuleImp with HasPeripheryD
outer.debug.module.io.dmi.dmiClock := sj.jtag.TCK
psd <> outer.debug.module.io.psd
outer.debug.module.io.dmi.dmiReset := ResetCatchAndSync(sj.jtag.TCK, sj.reset, "dmiResetCatch", psd.test_mode, psd.test_mode_reset)
outer.debug.module.io.dmi.dmiReset := ResetCatchAndSync(sj.jtag.TCK, sj.reset, "dmiResetCatch", psd)
dtm
}