riscv/rocket-chip
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Timeout cycles now defined in toplevel Makefrag in order to allow for easier alteration when debugging.

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This commit is contained in:
Stephen Twigg 2014-02-12 16:50:13 -08:00
parent e5de170215
commit 6808245bb5
2 changed files with 5 additions and 5 deletions
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2
Makefrag
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@ -1,4 +1,6 @@
# Makefile snippet used by emulator/vlsi/fpga backends
asm_timeout_cycles = 10000000
bmark_timeout_cycles = 100000000
MODEL := Top
CXX := g++

8
emulator/Makefile
View File

@ -60,8 +60,6 @@ test:
# Run assembly tests and benchmarks
#--------------------------------------------------------------------
MAX_CYCLES=30000000
%.hex:
$(MAKE) -C $(dir $@) $(notdir $@)
@ -84,15 +82,15 @@ output:
mkdir -p $@
output/%.run: output/%.hex emulator
./emulator +dramsim +max-cycles=$(MAX_CYCLES) +loadmem=$< none 2> /dev/null 2> $@ && [ $$PIPESTATUS -eq 0 ]
./emulator +dramsim +max-cycles=$(bmark_timeout_cycles) +loadmem=$< none 2> /dev/null 2> $@ && [ $$PIPESTATUS -eq 0 ]
output/%.out: output/%.hex emulator
./emulator +dramsim +max-cycles=$(MAX_CYCLES) +verbose +coremap-random +loadmem=$< none $(disasm) $@ && [ $$PIPESTATUS -eq 0 ]
./emulator +dramsim +max-cycles=$(bmark_timeout_cycles) +verbose +coremap-random +loadmem=$< none $(disasm) $@ && [ $$PIPESTATUS -eq 0 ]
output/%.vpd: output/%.hex emulator-debug
rm -rf $@.vcd && mkfifo $@.vcd
vcd2vpd $@.vcd $@ > /dev/null &
./emulator-debug +dramsim +max-cycles=$(MAX_CYCLES) +verbose -v$@.vcd +coremap-random +loadmem=$< none $(disasm) $(patsubst %.vpd,%.out,$@) && [ $$PIPESTATUS -eq 0 ]
./emulator-debug +dramsim +max-cycles=$(bmark_timeout_cycles) +verbose -v$@.vcd +coremap-random +loadmem=$< none $(disasm) $(patsubst %.vpd,%.out,$@) && [ $$PIPESTATUS -eq 0 ]
run-asm-tests: $(addprefix output/, $(addsuffix .out, $(asm_p_tests) $(asm_v_tests)))
@echo; perl -ne 'print " [$$1] $$ARGV \t$$2\n" if /\*{3}(.{8})\*{3}(.*)/' $^; echo;