riscv/rocket-chip
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Fixed BHT update error.

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- separated out BTB/BHT update
   - BHT updates counters on every branch
   - BTB update only on mispredicted and taken branches
This commit is contained in:
Christopher Celio
2014-11-16 22:02:27 -08:00
parent fea31d2167
commit 6749f67b7f
4 changed files with 54 additions and 40 deletions
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11
rocket/src/main/scala/ctrl.scala
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@ -652,17 +652,24 @@ class Control extends Module
Mux(replay_wb, PC_WB, // replay
PC_MEM)))
io.imem.btb_update.valid := take_pc_mem && !take_pc_wb
io.imem.btb_update.valid := io.dpath.mem_misprediction && ((mem_reg_branch && io.dpath.mem_br_taken) || mem_reg_jalr || mem_reg_jal) && !take_pc_wb
io.imem.btb_update.bits.prediction.valid := mem_reg_btb_hit
io.imem.btb_update.bits.prediction.bits := mem_reg_btb_resp
io.imem.btb_update.bits.taken := mem_reg_branch && io.dpath.mem_br_taken || io.imem.btb_update.bits.isJump
io.imem.btb_update.bits.isJump := mem_reg_jal || mem_reg_jalr
io.imem.btb_update.bits.isReturn := mem_reg_jalr && io.dpath.mem_rs1_ra
io.imem.bht_update.valid := mem_reg_branch && !take_pc_wb
io.imem.bht_update.bits.taken := io.dpath.mem_br_taken
io.imem.bht_update.bits.mispredict := io.dpath.mem_misprediction
io.imem.bht_update.bits.prediction.valid := mem_reg_btb_hit
io.imem.bht_update.bits.prediction.bits := mem_reg_btb_resp
io.imem.ras_update.valid := io.imem.btb_update.bits.isJump && !take_pc_wb
io.imem.ras_update.bits.isCall := mem_reg_wen && io.dpath.mem_waddr(0)
io.imem.ras_update.bits.isReturn := mem_reg_jalr && io.dpath.mem_rs1_ra
io.imem.ras_update.bits.prediction.valid := mem_reg_btb_hit
io.imem.ras_update.bits.prediction.bits := mem_reg_btb_resp
io.imem.req.valid := take_pc
val bypassDst = Array(id_raddr1, id_raddr2)