riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

Add a jtag-dtm-regression target to the regression

Browse Source 
This doesn't get added to Travis, but this target can be used
by other automated testing tools which may want to do further
testing on rocket-chip.
This commit is contained in:
Megan Wachs 2016-08-23 16:53:50 -07:00
parent 32118269c1
commit 67467c65f5
1 changed files with 61 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

61
regression/Makefile
View File

@ -49,6 +49,13 @@ CONFIGS=MemtestConfig MemtestBufferlessConfig MemtestStatelessConfig FancyMemtes
UnitTestConfig UnitTestConfig
endif endif
ifeq ($(SUITE), JtagDtmSuite)
CONFIGS_32=WithJtagDTM_DefaultRV32Config
CONFIGS_64=WithJtagDTM_DefaultConfig
CONFIGS += $(CONFIGS_32)
CONFIGS += $(CONFIGS_64)
endif
# These are the named regression targets. While it's expected you run them in # These are the named regression targets. While it's expected you run them in
# this order, since there's dependencies for everything it doesn't actually # this order, since there's dependencies for everything it doesn't actually
# matter. They're here to make running the various targets from the # matter. They're here to make running the various targets from the
@ -182,3 +189,57 @@ stamps/%/emulator-torture-$(TORTURE_CONFIG).stamp: stamps/%/emulator-debug.stamp
mkdir -p $(dir $@) mkdir -p $(dir $@)
$(MAKE) -C $(abspath $(TOP))/torture cnight RTL_CONFIG=$* RISCV=$(abspath $(RISCV)) PATH="$(abspath $(RISCV)/bin:$(PATH))" OPTIONS="-C $(abspath $(TOP)/torture/config/$(TORTURE_CONFIG).config) -p $(abspath $(TORTURE_SAVE_DIR)) -m 30 -t 10" $(MAKE) -C $(abspath $(TOP))/torture cnight RTL_CONFIG=$* RISCV=$(abspath $(RISCV)) PATH="$(abspath $(RISCV)/bin:$(PATH))" OPTIONS="-C $(abspath $(TOP)/torture/config/$(TORTURE_CONFIG).config) -p $(abspath $(TORTURE_SAVE_DIR)) -m 30 -t 10"
date > $@ date > $@
# Targets for JTAG DTM full-chain simulation
OPENOCD_HEAD ?= riscv
OPENOCD_INSTALL ?= $(abspath $(TOP))/openocd-install
OPENOCD_VERSION = $(shell git ls-remote http://github.com/sifive/openocd.git $(OPENOCD_HEAD) | awk '{print $$1}')
OPENOCD_DIR = $(OPENOCD_INSTALL)_$(OPENOCD_VERSION)/
$(OPENOCD_DIR)/bin/openocd:
rm -rf openocd
git clone http://github.com/sifive/openocd.git
cd openocd ; \
git checkout $(OPENOCD_VERSION) ; \
./bootstrap ; \
./configure --enable-jtag-vpi --prefix=$(OPENOCD_INSTALL)_$(OPENOCD_VERSION) ; \
make ; \
make install
install_openocd: $(OPENOCD_DIR)/bin/openocd
# If this is defined empty, then all tests would run.
# Running a list of tests is not supported.
JTAG_DTM_TEST ?= SimpleRegisterTest.test_s0
stamps/%/jtag-dtm-32-$(JTAG_DTM_TEST).stamp: install_openocd stamps/%/vsim-ndebug.stamp
$(abspath $(TOP))/riscv-tools/riscv-tests/debug/gdbserver.py \
--run $(abspath $(TOP))/vsim/simv-TestHarness-$* \
--cmd="$(OPENOCD_DIR)/bin/openocd \
--s $(OPENOCD_DIR)/share/openocd/scripts" \
--freedom-e300-sim \
$(JTAG_DTM_TEST)
date > $@
stamps/%/jtag-dtm-64-$(JTAG_DTM_TEST).stamp: install_openocd stamps/%/vsim-ndebug.stamp
$(abspath $(TOP))/riscv-tools/riscv-tests/debug/gdbserver.py \
--run $(abspath $(TOP))/vsim/simv-TestHarness-$* \
--cmd="$(OPENOCD_INSTALL)_$(OPENOCD_VERSION)/bin/openocd \
--s $(OPENOCD_INSTALL)_$(OPENOCD_VERSION)/share/openocd/scripts" \
--freedom-u500-sim \
$(JTAG_DTM_TEST)
date > $@
JTAG_DTM_32_TEST_STAMPS=$(foreach config,$(CONFIGS_32),stamps/$(config)/jtag-dtm-32-$(JTAG_DTM_TEST).stamp)
JTAG_DTM_64_TEST_STAMPS=$(foreach config,$(CONFIGS_64),stamps/$(config)/jtag-dtm-64-$(JTAG_DTM_TEST).stamp)
jtag-dtm-tests-32 : $(JTAG_DTM_32_TEST_STAMPS)
jtag-dtm-tests-64 : $(JTAG_DTM_64_TEST_STAMPS)
# Targets for JTAG DTM full-chain simulation
jtag-dtm-regression: jtag-dtm-tests-32 jtag-dtm-tests-64