Add a jtag-dtm-regression target to the regression
This doesn't get added to Travis, but this target can be used by other automated testing tools which may want to do further testing on rocket-chip.
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@ -49,6 +49,13 @@ CONFIGS=MemtestConfig MemtestBufferlessConfig MemtestStatelessConfig FancyMemtes
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UnitTestConfig
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endif
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ifeq ($(SUITE), JtagDtmSuite)
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CONFIGS_32=WithJtagDTM_DefaultRV32Config
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CONFIGS_64=WithJtagDTM_DefaultConfig
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CONFIGS += $(CONFIGS_32)
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CONFIGS += $(CONFIGS_64)
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endif
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# These are the named regression targets. While it's expected you run them in
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# this order, since there's dependencies for everything it doesn't actually
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# matter. They're here to make running the various targets from the
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@ -182,3 +189,57 @@ stamps/%/emulator-torture-$(TORTURE_CONFIG).stamp: stamps/%/emulator-debug.stamp
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mkdir -p $(dir $@)
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$(MAKE) -C $(abspath $(TOP))/torture cnight RTL_CONFIG=$* RISCV=$(abspath $(RISCV)) PATH="$(abspath $(RISCV)/bin:$(PATH))" OPTIONS="-C $(abspath $(TOP)/torture/config/$(TORTURE_CONFIG).config) -p $(abspath $(TORTURE_SAVE_DIR)) -m 30 -t 10"
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date > $@
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# Targets for JTAG DTM full-chain simulation
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OPENOCD_HEAD ?= riscv
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OPENOCD_INSTALL ?= $(abspath $(TOP))/openocd-install
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OPENOCD_VERSION = $(shell git ls-remote http://github.com/sifive/openocd.git $(OPENOCD_HEAD) | awk '{print $$1}')
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OPENOCD_DIR = $(OPENOCD_INSTALL)_$(OPENOCD_VERSION)/
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$(OPENOCD_DIR)/bin/openocd:
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rm -rf openocd
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git clone http://github.com/sifive/openocd.git
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cd openocd ; \
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git checkout $(OPENOCD_VERSION) ; \
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./bootstrap ; \
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./configure --enable-jtag-vpi --prefix=$(OPENOCD_INSTALL)_$(OPENOCD_VERSION) ; \
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make ; \
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make install
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install_openocd: $(OPENOCD_DIR)/bin/openocd
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# If this is defined empty, then all tests would run.
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# Running a list of tests is not supported.
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JTAG_DTM_TEST ?= SimpleRegisterTest.test_s0
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stamps/%/jtag-dtm-32-$(JTAG_DTM_TEST).stamp: install_openocd stamps/%/vsim-ndebug.stamp
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$(abspath $(TOP))/riscv-tools/riscv-tests/debug/gdbserver.py \
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--run $(abspath $(TOP))/vsim/simv-TestHarness-$* \
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--cmd="$(OPENOCD_DIR)/bin/openocd \
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--s $(OPENOCD_DIR)/share/openocd/scripts" \
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--freedom-e300-sim \
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$(JTAG_DTM_TEST)
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date > $@
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stamps/%/jtag-dtm-64-$(JTAG_DTM_TEST).stamp: install_openocd stamps/%/vsim-ndebug.stamp
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$(abspath $(TOP))/riscv-tools/riscv-tests/debug/gdbserver.py \
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--run $(abspath $(TOP))/vsim/simv-TestHarness-$* \
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--cmd="$(OPENOCD_INSTALL)_$(OPENOCD_VERSION)/bin/openocd \
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--s $(OPENOCD_INSTALL)_$(OPENOCD_VERSION)/share/openocd/scripts" \
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--freedom-u500-sim \
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$(JTAG_DTM_TEST)
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date > $@
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JTAG_DTM_32_TEST_STAMPS=$(foreach config,$(CONFIGS_32),stamps/$(config)/jtag-dtm-32-$(JTAG_DTM_TEST).stamp)
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JTAG_DTM_64_TEST_STAMPS=$(foreach config,$(CONFIGS_64),stamps/$(config)/jtag-dtm-64-$(JTAG_DTM_TEST).stamp)
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jtag-dtm-tests-32 : $(JTAG_DTM_32_TEST_STAMPS)
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jtag-dtm-tests-64 : $(JTAG_DTM_64_TEST_STAMPS)
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# Targets for JTAG DTM full-chain simulation
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jtag-dtm-regression: jtag-dtm-tests-32 jtag-dtm-tests-64
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