Merge sptbr and sasid

2016-06-17 18:29:05 -07:00
parent 0b4c8e9af7
commit 60bddddfe6
8 changed files with 24 additions and 16 deletions
--- a/rocket/src/main/scala/frontend.scala
+++ b/rocket/src/main/scala/frontend.scala
@ -96,7 +96,6 @@ class Frontend(implicit p: Parameters) extends CoreModule()(p) with HasL1CachePa
  io.ptw <> tlb.io.ptw
  tlb.io.req.valid := !stall && !icmiss
  tlb.io.req.bits.vpn := s1_pc >> pgIdxBits
-  tlb.io.req.bits.asid := UInt(0)
  tlb.io.req.bits.passthrough := Bool(false)
  tlb.io.req.bits.instruction := Bool(true)
  tlb.io.req.bits.store := Bool(false)