riscv/rocket-chip
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rocket: pass scratchpad address to block dcache

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This commit is contained in:
Wesley W. Terpstra
2016-11-21 12:19:33 -08:00
parent c18bc07bbc
commit 5fe107bb07
6 changed files with 20 additions and 13 deletions
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9
src/main/scala/rocket/tile.scala
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@ -40,7 +40,14 @@ class RocketTile(tileId: Int)(implicit p: Parameters) extends LazyModule {
//TODO val intNode = IntInputNode()
val slaveNode = if (p(DataScratchpadSize) == 0) None else Some(TLInputNode())
val scratch = if (p(DataScratchpadSize) == 0) None else Some(LazyModule(new ScratchpadSlavePort()(dcacheParams)))
val dcache = HellaCache(p(DCacheKey))(dcacheParams)
def findScratch() = scratch.map { s =>
val finalNode = uncachedOut.edgesOut(0).manager.managers.find(_.nodePath.last == s.node)
require (finalNode.isDefined, "Could not find the scratch pad; not reachable via icache?")
require (finalNode.get.address.size == 1, "Scratchpad address space was fragmented!")
finalNode.get.address(0)
}
val dcache = HellaCache(p(DCacheKey), findScratch)(dcacheParams)
val ucLegacy = LazyModule(new TLLegacy()(icacheParams))
val cachedOut = TLOutputNode()