riscv/rocket-chip
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Fix ITIM deallocation during I$ refill causing data corruption

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Deallocation can change repl_way, which violates the assumption that it
remains constant throughout refill.

The workaround described in commit 3db066303b
still suffices, provided only the hart that owns the ITIM changes the ITIM
allocation.

This subsumes commit 3db066303b.
This commit is contained in:
Andrew Waterman 2017-11-20 12:30:40 -08:00
parent 66b7a8a5ed
commit 5e94884f09
1 changed files with 1 additions and 1 deletions
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2
src/main/scala/rocket/ICache.scala
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@ -294,7 +294,7 @@ class ICacheModule(outer: ICache) extends LazyModuleImp(outer)
val enable = scratchpadWayValid(scratchpadWay(a.address)) val enable = scratchpadWayValid(scratchpadWay(a.address))
when (!lineInScratchpad(scratchpadLine(a.address))) { when (!lineInScratchpad(scratchpadLine(a.address))) {
scratchpadMax.get := scratchpadLine(a.address) scratchpadMax.get := scratchpadLine(a.address)
when (enable) { invalidate := true } invalidate := true
} }
scratchpadOn := enable scratchpadOn := enable
} }