subsystem: even more general coupler methods
This commit is contained in:
parent
5b1d72c776
commit
5725e17969
@ -21,21 +21,18 @@ class FrontBus(params: FrontBusParams, val crossing: SubsystemClockCrossing = Sy
|
||||
(name: Option[String] = None, buffers: Int = 1)
|
||||
(gen: => NodeHandle[D,U,E,B,TLClientPortParameters,TLManagerPortParameters,TLEdgeOut,TLBundle] =
|
||||
TLIdentity.gen): InwardNodeHandle[D,U,E,B] = {
|
||||
from("port" named name) {
|
||||
val nodes = TLFIFOFixer(TLFIFOFixer.all) +: TLBuffer.chain(buffers)
|
||||
inwardNode :=* nodes.reduce(_ :=* _) :=* gen
|
||||
}
|
||||
from("port" named name) { fixFrom(TLFIFOFixer.all, buffers) :=* gen }
|
||||
}
|
||||
|
||||
def fromMasterNode( name: Option[String] = None, buffers: Int = 1)(gen: TLOutwardNode) {
|
||||
from("master" named name) { bufferFrom(buffers) :=* gen }
|
||||
def fromMasterNode(name: Option[String] = None, buffers: Int = 1)(gen: TLOutwardNode) {
|
||||
from("master" named name) { fixFrom(TLFIFOFixer.all, buffers) :=* gen }
|
||||
}
|
||||
|
||||
def fromMaster[D,U,E,B <: Data]
|
||||
(name: Option[String] = None, buffers: Int = 1)
|
||||
(gen: => NodeHandle[D,U,E,B,TLClientPortParameters,TLManagerPortParameters,TLEdgeOut,TLBundle] =
|
||||
TLIdentity.gen): InwardNodeHandle[D,U,E,B] = {
|
||||
from("master" named name) { bufferFrom(buffers) :=* gen }
|
||||
from("master" named name) { fixFrom(TLFIFOFixer.all, buffers) :=* gen }
|
||||
}
|
||||
|
||||
def fromCoherentChip(gen: => TLNode): TLInwardNode = {
|
||||
|
@ -21,94 +21,73 @@ class PeripheryBus(params: PeripheryBusParams, val crossing: SubsystemClockCross
|
||||
with HasTLXbarPhy
|
||||
with HasCrossing {
|
||||
|
||||
def toSlave[D,U,E,B <: Data](
|
||||
name: Option[String] = None,
|
||||
buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[
|
||||
TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,
|
||||
D,U,E,B] = TLIdentity.gen): OutwardNodeHandle[D,U,E,B] = {
|
||||
def toSlave[D,U,E,B <: Data]
|
||||
(name: Option[String] = None, buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,D,U,E,B] =
|
||||
TLIdentity.gen): OutwardNodeHandle[D,U,E,B] = {
|
||||
to("slave" named name) { gen :*= bufferTo(buffer) }
|
||||
}
|
||||
|
||||
def toVariableWidthSlaveNode(
|
||||
name: Option[String] = None,
|
||||
buffer: BufferParams = BufferParams.none)
|
||||
(gen: TLInwardNode) {
|
||||
to("slave" named name) {
|
||||
gen :*= fragmentTo(params.beatBytes, params.blockBytes, buffer)
|
||||
}
|
||||
def toVariableWidthSlaveNode(name: Option[String] = None, buffer: BufferParams = BufferParams.none)(node: TLInwardNode) { toVariableWidthSlaveNodeOption(name, buffer)(Some(node)) }
|
||||
|
||||
def toVariableWidthSlaveNodeOption(name: Option[String] = None, buffer: BufferParams = BufferParams.none)(node: Option[TLInwardNode]) {
|
||||
node foreach { n => to("slave" named name) { n :*= fragmentTo(buffer) } }
|
||||
}
|
||||
|
||||
def toVariableWidthSlave[D,U,E,B <: Data](
|
||||
name: Option[String] = None,
|
||||
buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[
|
||||
TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,
|
||||
D,U,E,B] = TLIdentity.gen): OutwardNodeHandle[D,U,E,B] = {
|
||||
to("slave" named name) {
|
||||
gen :*= fragmentTo(params.beatBytes, params.blockBytes, buffer)
|
||||
}
|
||||
def toVariableWidthSlave[D,U,E,B <: Data]
|
||||
(name: Option[String] = None, buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,D,U,E,B] =
|
||||
TLIdentity.gen): OutwardNodeHandle[D,U,E,B] = {
|
||||
to("slave" named name) { gen :*= fragmentTo(buffer) }
|
||||
}
|
||||
|
||||
def toFixedWidthSlaveNode(
|
||||
name: Option[String] = None,
|
||||
buffer: BufferParams = BufferParams.none)
|
||||
(gen: TLInwardNode) {
|
||||
def toFixedWidthSlaveNode(name: Option[String] = None, buffer: BufferParams = BufferParams.none)(gen: TLInwardNode) {
|
||||
to("slave" named name) { gen :*= fixedWidthTo(buffer) }
|
||||
}
|
||||
|
||||
def toFixedWidthSlave[D,U,E,B <: Data](
|
||||
name: Option[String] = None,
|
||||
buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[
|
||||
TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,
|
||||
D,U,E,B] = TLIdentity.gen): OutwardNodeHandle[D,U,E,B] = {
|
||||
def toFixedWidthSlave[D,U,E,B <: Data]
|
||||
(name: Option[String] = None, buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,D,U,E,B] =
|
||||
TLIdentity.gen): OutwardNodeHandle[D,U,E,B] = {
|
||||
to("slave" named name) { gen :*= fixedWidthTo(buffer) }
|
||||
}
|
||||
|
||||
def toFixedWidthSingleBeatSlaveNode(
|
||||
widthBytes: Int,
|
||||
name: Option[String] = None,
|
||||
buffer: BufferParams = BufferParams.none)
|
||||
def toFixedWidthSingleBeatSlaveNode
|
||||
(widthBytes: Int, name: Option[String] = None, buffer: BufferParams = BufferParams.none)
|
||||
(gen: TLInwardNode) {
|
||||
to("slave" named name) {
|
||||
gen :*= TLFragmenter(widthBytes, params.blockBytes) :*= fixedWidthTo(buffer)
|
||||
}
|
||||
}
|
||||
|
||||
def toFixedWidthSingleBeatSlave[D,U,E,B <: Data](
|
||||
widthBytes: Int,
|
||||
name: Option[String] = None,
|
||||
buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[
|
||||
TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,
|
||||
D,U,E,B] = TLIdentity.gen): OutwardNodeHandle[D,U,E,B] = {
|
||||
def toFixedWidthSingleBeatSlave[D,U,E,B <: Data]
|
||||
(widthBytes: Int, name: Option[String] = None, buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,D,U,E,B] =
|
||||
TLIdentity.gen): OutwardNodeHandle[D,U,E,B] = {
|
||||
to("slave" named name) {
|
||||
gen :*= TLFragmenter(widthBytes, params.blockBytes) :*= fixedWidthTo(buffer)
|
||||
}
|
||||
}
|
||||
|
||||
def toLargeBurstSlave(
|
||||
maxXferBytes: Int,
|
||||
name: Option[String] = None,
|
||||
buffer: BufferParams = BufferParams.none)
|
||||
(gen: => TLNode): TLOutwardNode = {
|
||||
def toLargeBurstSlave[D,U,E,B <: Data]
|
||||
(maxXferBytes: Int, name: Option[String] = None, buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,D,U,E,B] =
|
||||
TLIdentity.gen): OutwardNodeHandle[D,U,E,B] = {
|
||||
to("slave" named name) {
|
||||
gen :*= fragmentTo(params.beatBytes, maxXferBytes, buffer)
|
||||
}
|
||||
}
|
||||
|
||||
def toFixedWidthPort[D,U,E,B <: Data](
|
||||
name: Option[String] = None,
|
||||
buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,D,U,E,B]): OutwardNodeHandle[D,U,E,B] = {
|
||||
def toFixedWidthPort[D,U,E,B <: Data]
|
||||
(name: Option[String] = None, buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,D,U,E,B] =
|
||||
TLIdentity.gen): OutwardNodeHandle[D,U,E,B] = {
|
||||
to("port" named name) { gen := fixedWidthTo(buffer) }
|
||||
}
|
||||
|
||||
|
||||
def fromSystemBus(
|
||||
arithmetic: Boolean = true,
|
||||
buffer: BufferParams = BufferParams.default)
|
||||
def fromSystemBus
|
||||
(arithmetic: Boolean = true, buffer: BufferParams = BufferParams.default)
|
||||
(gen: => TLOutwardNode) {
|
||||
from("sbus") {
|
||||
(inwardNode
|
||||
@ -118,17 +97,16 @@ class PeripheryBus(params: PeripheryBusParams, val crossing: SubsystemClockCross
|
||||
}
|
||||
}
|
||||
|
||||
def fromOtherMaster(
|
||||
name: Option[String] = None,
|
||||
buffer: BufferParams = BufferParams.none)
|
||||
(gen: => TLNode): TLInwardNode = {
|
||||
def fromOtherMaster[D,U,E,B <: Data]
|
||||
(name: Option[String] = None, buffer: BufferParams = BufferParams.none)
|
||||
(gen: => NodeHandle[D,U,E,B,TLClientPortParameters,TLManagerPortParameters,TLEdgeOut,TLBundle] =
|
||||
TLIdentity.gen): InwardNodeHandle[D,U,E,B] = {
|
||||
from("master" named name) { bufferFrom(buffer) :=* gen }
|
||||
}
|
||||
|
||||
|
||||
def toTile(
|
||||
name: Option[String] = None,
|
||||
buffers: Int = 0)
|
||||
def toTile
|
||||
(name: Option[String] = None, buffers: Int = 0)
|
||||
(gen: => TLNode): TLOutwardNode = {
|
||||
to("tile" named name) { FlipRendering { implicit p =>
|
||||
gen :*= bufferTo(buffers)
|
||||
|
@ -18,6 +18,9 @@ class SystemBus(params: SystemBusParams)(implicit p: Parameters) extends TLBusWr
|
||||
private val master_splitter = LazyModule(new TLSplitter)
|
||||
inwardNode :=* master_splitter.node
|
||||
|
||||
protected def fixFromThenSplit(policy: TLFIFOFixer.Policy, buffers: Int): TLInwardNode =
|
||||
master_splitter.node :=* TLBuffer.chain(buffers).foldLeft(TLFIFOFixer(policy))(_ :=* _)
|
||||
|
||||
def busView = master_splitter.node.edges.in.head
|
||||
|
||||
def toPeripheryBus(buffer: BufferParams = BufferParams.none)
|
||||
@ -59,9 +62,7 @@ class SystemBus(params: SystemBusParams)(implicit p: Parameters) extends TLBusWr
|
||||
(name: Option[String] = None, buffer: BufferParams = BufferParams.default)
|
||||
(gen: => NodeHandle[TLClientPortParameters,TLManagerPortParameters,TLEdgeIn,TLBundle,D,U,E,B] =
|
||||
TLIdentity.gen): OutwardNodeHandle[D,U,E,B] = {
|
||||
to("slave" named name) {
|
||||
gen :*= TLFragmenter(params.beatBytes, params.blockBytes) :*= bufferTo(buffer)
|
||||
}
|
||||
to("slave" named name) { gen :*= fragmentTo(buffer) }
|
||||
}
|
||||
|
||||
def fromFrontBus(gen: => TLNode): TLInwardNode = {
|
||||
@ -72,8 +73,7 @@ class SystemBus(params: SystemBusParams)(implicit p: Parameters) extends TLBusWr
|
||||
(name: Option[String], buffers: Int = 0, cork: Option[Boolean] = None)
|
||||
(gen: => TLNode): TLInwardNode = {
|
||||
from("tile" named name) {
|
||||
(List(master_splitter.node, TLFIFOFixer(TLFIFOFixer.allUncacheable)) ++ TLBuffer.chain(buffers))
|
||||
.reduce(_ :=* _) :=* gen
|
||||
fixFromThenSplit(TLFIFOFixer.allUncacheable, buffers) :=* gen
|
||||
}
|
||||
}
|
||||
|
||||
@ -88,34 +88,20 @@ class SystemBus(params: SystemBusParams)(implicit p: Parameters) extends TLBusWr
|
||||
(name: Option[String] = None, buffers: Int = 0)
|
||||
(gen: => NodeHandle[D,U,E,B,TLClientPortParameters,TLManagerPortParameters,TLEdgeOut,TLBundle] =
|
||||
TLIdentity.gen): InwardNodeHandle[D,U,E,B] = {
|
||||
from("port" named name) {
|
||||
(List(
|
||||
master_splitter.node,
|
||||
TLFIFOFixer(TLFIFOFixer.all)) ++
|
||||
TLBuffer.chain(buffers)).reduce(_ :=* _) :=* gen
|
||||
}
|
||||
from("port" named name) { fixFromThenSplit(TLFIFOFixer.all, buffers) :=* gen }
|
||||
}
|
||||
|
||||
def fromCoherentMaster[D,U,E,B <: Data]
|
||||
(name: Option[String] = None, buffers: Int = 0)
|
||||
(gen: => NodeHandle[D,U,E,B,TLClientPortParameters,TLManagerPortParameters,TLEdgeOut,TLBundle] =
|
||||
TLIdentity.gen): InwardNodeHandle[D,U,E,B] = {
|
||||
from("coherent_master" named name) {
|
||||
(inwardNode
|
||||
:=* TLBuffer.chain(buffers).foldLeft(TLFIFOFixer(TLFIFOFixer.all))(_ :=* _)
|
||||
:=* gen)
|
||||
}
|
||||
from("coherent_master" named name) { fixFrom(TLFIFOFixer.all, buffers) :=* gen }
|
||||
}
|
||||
|
||||
def fromMaster[D,U,E,B <: Data]
|
||||
(name: Option[String] = None, buffers: Int = 0)
|
||||
(gen: => NodeHandle[D,U,E,B,TLClientPortParameters,TLManagerPortParameters,TLEdgeOut,TLBundle] =
|
||||
TLIdentity.gen): InwardNodeHandle[D,U,E,B] = {
|
||||
from("master" named name) {
|
||||
(master_splitter.node
|
||||
:=* TLFIFOFixer(TLFIFOFixer.all)
|
||||
:=* TLBuffer.chain(buffers).reduce(_ :=* _)
|
||||
:=* gen)
|
||||
}
|
||||
from("master" named name) { fixFromThenSplit(TLFIFOFixer.all, buffers) :=* gen }
|
||||
}
|
||||
}
|
||||
|
@ -35,6 +35,9 @@ abstract class TLBusWrapper(params: HasTLBusParams, val busName: String)(implici
|
||||
protected def bufferFrom(buffers: Int): TLInwardNode =
|
||||
TLBuffer.chain(buffers).foldLeft(inwardNode)(_ :=* _)
|
||||
|
||||
protected def fixFrom(policy: TLFIFOFixer.Policy, buffers: Int): TLInwardNode =
|
||||
inwardNode :=* TLBuffer.chain(buffers).foldLeft(TLFIFOFixer(policy))(_ :=* _)
|
||||
|
||||
protected def bufferTo(buffer: BufferParams): TLOutwardNode =
|
||||
TLBuffer(buffer) :*= delayNode :*= outwardNode
|
||||
|
||||
@ -50,7 +53,6 @@ abstract class TLBusWrapper(params: HasTLBusParams, val busName: String)(implici
|
||||
protected def fragmentTo(minSize: Int, maxSize: Int, buffer: BufferParams): TLOutwardNode =
|
||||
TLFragmenter(minSize, maxSize) :*= bufferTo(buffer)
|
||||
|
||||
|
||||
protected def delayNode(implicit p: Parameters): TLNode = {
|
||||
val delayProb = p(TLBusDelayProbability)
|
||||
if (delayProb > 0.0) {
|
||||
|
Loading…
Reference in New Issue
Block a user