Fold uncore constants into TileLinkConfiguration, update coherence API
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@@ -7,7 +7,7 @@ import Util._
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class RocketIO(implicit conf: RocketConfiguration) extends Bundle
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{
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val host = new HTIFIO(conf.lnConf.nClients)
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val host = new HTIFIO(conf.tl.ln.nClients)
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val imem = new CPUFrontendIO()(conf.icache)
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val vimem = new CPUFrontendIO()(conf.icache)
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val dmem = new HellaCacheIO()(conf.dcache)
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