Add instruction-trace port

2017-09-19 22:59:28 -07:00
parent acea94bcef
commit 4d6d6ff641
7 changed files with 62 additions and 33 deletions
--- a/src/main/scala/groundtest/TraceGen.scala
+++ b/src/main/scala/groundtest/TraceGen.scala
@ -65,6 +65,7 @@ case class TraceGenParams(
    memStart: BigInt, //p(ExtMem).base
    numGens: Int) extends GroundTestTileParams {
  def build(i: Int, p: Parameters): GroundTestTile = new TraceGenTile(i, this)(p)
+  val trace = false
 }

 trait HasTraceGenParams {