Refactor package hierarchy and remove legacy bus protocol implementations (#845)

* Refactors package hierarchy.

Additionally:
  - Removes legacy ground tests and configs
  - Removes legacy bus protocol implementations
  - Removes NTiles
  - Adds devices package
  - Adds more functions to util package

src/main/scala/amba/ahb/Bundles.scala

@@ -0,0 +1,35 @@
+// See LICENSE.SiFive for license details.
+
+package freechips.rocketchip.amba.ahb
+
+import Chisel._
+import freechips.rocketchip.util.GenericParameterizedBundle
+
+abstract class AHBBundleBase(params: AHBBundleParameters) extends GenericParameterizedBundle(params)
+
+// Signal directions are from the master's point-of-view
+class AHBBundle(params: AHBBundleParameters) extends AHBBundleBase(params)
+{
+  // Flow control signals from the master
+  val hmastlock = Bool(OUTPUT)
+  val htrans    = UInt(OUTPUT, width = params.transBits)
+  val hsel      = Bool(OUTPUT)
+  val hready    = Bool(OUTPUT) // on a master, drive this from readyout
+
+  // Payload signals
+  val hwrite    = Bool(OUTPUT)
+  val haddr     = UInt(OUTPUT, width = params.addrBits)
+  val hsize     = UInt(OUTPUT, width = params.sizeBits)
+  val hburst    = UInt(OUTPUT, width = params.burstBits)
+  val hprot     = UInt(OUTPUT, width = params.protBits)
+  val hwdata    = UInt(OUTPUT, width = params.dataBits)
+
+  val hreadyout = Bool(INPUT)
+  val hresp     = Bool(INPUT)
+  val hrdata    = UInt(INPUT, width = params.dataBits)
+}
+
+object AHBBundle
+{
+  def apply(params: AHBBundleParameters) = new AHBBundle(params)
+}