Remove JTAG vpi from VCS build
h/t @mwachs5 Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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@ -5,7 +5,6 @@
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# Verilog sources
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# Verilog sources
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bb_vsrcs = \
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bb_vsrcs = \
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$(base_dir)/vsrc/jtag_vpi.v \
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$(base_dir)/vsrc/plusarg_reader.v \
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$(base_dir)/vsrc/plusarg_reader.v \
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$(base_dir)/vsrc/ClockDivider2.v \
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$(base_dir)/vsrc/ClockDivider2.v \
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$(base_dir)/vsrc/ClockDivider3.v \
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$(base_dir)/vsrc/ClockDivider3.v \
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@ -24,8 +23,7 @@ sim_vsrcs = \
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sim_csrcs = \
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sim_csrcs = \
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$(base_dir)/csrc/SimDTM.cc \
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$(base_dir)/csrc/SimDTM.cc \
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$(base_dir)/csrc/SimJTAG.cc \
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$(base_dir)/csrc/SimJTAG.cc \
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$(base_dir)/csrc/remote_bitbang.cc \
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$(base_dir)/csrc/remote_bitbang.cc
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$(base_dir)/csrc/jtag_vpi.c
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#--------------------------------------------------------------------
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#--------------------------------------------------------------------
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# Build Verilog
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# Build Verilog
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@ -60,7 +58,6 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
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+libext+.v \
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+libext+.v \
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VCS_OPTS += +vpi
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VCS_OPTS += +vpi
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VCS_OPTS += -P $(base_dir)/vsrc/jtag_vpi.tab
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VCS_OPTS += -CC "-DVCS_VPI"
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VCS_OPTS += -CC "-DVCS_VPI"
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