Fix bug in D$ AMO/storegen logic
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@ -387,9 +387,9 @@ class DCache(implicit p: Parameters) extends L1HellaCacheModule()(p) {
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// AMOs
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if (usingAtomics) {
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val amoalu = Module(new AMOALU)
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amoalu.io.addr := s2_req.addr
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amoalu.io.cmd := s2_req.cmd
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amoalu.io.typ := s2_req.typ
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amoalu.io.addr := pstore1_addr
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amoalu.io.cmd := pstore1_cmd
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amoalu.io.typ := pstore1_typ
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amoalu.io.lhs := s2_data_word
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amoalu.io.rhs := pstore1_data
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pstore1_storegen_data := amoalu.io.out
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