rocket: use diplomatic interrupts

This makes it possible for the PLIC to work with heterogenous cores.
This commit is contained in:
Wesley W. Terpstra committed 2017-03-02 21:19:23 -08:00
1 parent d3c5318714
commit 4535de2669
6 files changed
+52 -58

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@@ -49,7 +49,6 @@ trait HasCoreplexParameters {
lazy val cbusConfig = p(CBusConfig)
lazy val l1tol2Config = p(L1toL2Config)
lazy val nTiles = tilesParams.size
lazy val hasSupervisor = tilesParams.exists(_.core.useVM) // TODO ask andrew about this
lazy val l2Config = p(BankedL2Config)
}