riscv/rocket-chip
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updated itlb

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This commit is contained in:
Rimas Avizienis
2011-11-11 18:48:34 -08:00
parent a1ce908541
commit 44926866b7
4 changed files with 31 additions and 22 deletions
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7
rocket/src/main/scala/cpu.scala
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@ -62,13 +62,14 @@ class rocketProc extends Component
itlb.io.cpu.status := dpath.io.ctrl.status;
itlb.io.cpu.req_val := ctrl.io.imem.req_val;
itlb.io.cpu.req_asid := Bits(0,ASID_BITS); // FIXME: connect to PCR
itlb.io.cpu.req_addr := dpath.io.imem.req_addr;
io.imem.req_val := itlb.io.cpu.resp_val;
io.imem.req_addr := itlb.io.cpu.resp_addr;
dtlb.io.cpu.req_vpn := dpath.io.imem.req_addr(VADDR_BITS-1,PGIDX_BITS);
io.imem.req_vpn := itlb.io.cpu.resp_vpn;
ctrl.io.imem.req_rdy := itlb.io.cpu.req_rdy && io.imem.req_rdy;
ctrl.io.imem.resp_val := io.imem.resp_val;
dpath.io.imem.resp_data := io.imem.resp_data;
ctrl.io.xcpt_itlb := itlb.io.cpu.exception;
ctrl.io.itlb_miss := itlb.io.cpu.resp_miss;
// connect DTLB to D$ arbiter, ctrl+dpath
dtlb.io.cpu.invalidate := Bool(false); // FIXME