riscv/rocket-chip
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fix missing "otherwise" in PCR file

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this fixes timer interrupts for VLSI backend.
This commit is contained in:
Andrew Waterman 2012-01-26 19:33:55 -08:00
parent 97c379f1d7
commit 41855a6d47
1 changed files with 3 additions and 1 deletions
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4
rocket/src/main/scala/dpath_util.scala
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@ -178,7 +178,9 @@ class rocketDpathPCR extends Component
when (io.w.addr === PCR_PTBR) { reg_ptbr <== Cat(io.w.data(PADDR_BITS-1, PGIDX_BITS), Bits(0, PGIDX_BITS)).toUFix; } when (io.w.addr === PCR_PTBR) { reg_ptbr <== Cat(io.w.data(PADDR_BITS-1, PGIDX_BITS), Bits(0, PGIDX_BITS)).toUFix; }
} }
reg_count <== reg_count + UFix(1); otherwise {
reg_count <== reg_count + UFix(1);
}
when (reg_count === reg_compare) { when (reg_count === reg_compare) {
r_irq_timer <== Bool(true); r_irq_timer <== Bool(true);
} }