[unittest] further refactor unittest framework

src/main/scala/unittest/Configs.scala

@@ -9,15 +9,36 @@ import cde.{Parameters, Config, CDEMatchError}
 import coreplex._
 import rocketchip._
 
-class WithUnitTest extends Config(
+class WithJunctionsUnitTests extends Config(
   (pname, site, here) => pname match {
-    case UnitTests => (testParams: Parameters) => {
+    case RegressionTestNames => LinkedHashSet("rv64ui-p-simple")
+    case UnitTests => (p: Parameters) => {
       TestGeneration.addSuite(DefaultTestSuites.groundtest64("p")) // TODO why
       TestGeneration.addSuite(DefaultTestSuites.emptyBmarks)
-      JunctionsUnitTests(testParams) ++ UncoreUnitTests(testParams) // TODO refactor
+      Seq(
+        Module(new junctions.MultiWidthFifoTest),
+        Module(new junctions.NastiMemoryDemuxTest()(p)),
+        Module(new junctions.HastiTest()(p)))
     }
-    case RegressionTestNames => LinkedHashSet("rv64ui-p-simple")
+    case UnitTestTimeout => 50000
     case _ => throw new CDEMatchError
   })
 
-class UnitTestConfig extends Config(new WithUnitTest ++ new BaseConfig)
+class WithUncoreUnitTests extends Config(
+  (pname, site, here) => pname match {
+    case NCoreplexExtClients => 0
+    case uncore.tilelink.TLId => "L1toL2"
+    case RegressionTestNames => LinkedHashSet("rv64ui-p-simple")
+    case UnitTests => (p: Parameters) => {
+      TestGeneration.addSuite(DefaultTestSuites.groundtest64("p")) // TODO why
+      TestGeneration.addSuite(DefaultTestSuites.emptyBmarks)
+      Seq(
+        Module(new uncore.devices.ROMSlaveTest()(p)),
+        Module(new uncore.devices.TileLinkRAMTest()(p)),
+        Module(new uncore.tilelink2.TLFuzzRAMTest))
+    }
+    case UnitTestTimeout => 500000
+    case _ => throw new CDEMatchError
+  })
+
+class UnitTestConfig extends Config(new WithUncoreUnitTests ++ new WithJunctionsUnitTests ++ new BaseConfig)

src/main/scala/unittest/TempListOfTests.scala

@@ -1,20 +0,0 @@
-package unittest
-
-import Chisel._
-import cde.Parameters
-
-object JunctionsUnitTests {
-  def apply(implicit p: Parameters): Seq[UnitTest] =
-    Seq(
-      Module(new junctions.MultiWidthFifoTest),
-      Module(new junctions.NastiMemoryDemuxTest),
-      Module(new junctions.HastiTest))
-}
-
-object UncoreUnitTests {
-  def apply(implicit p: Parameters): Seq[UnitTest] =
-    Seq(
-      Module(new uncore.devices.ROMSlaveTest),
-      Module(new uncore.devices.TileLinkRAMTest),
-      Module(new uncore.tilelink2.TLFuzzRAMTest))
-}

src/main/scala/unittest/TestHarness.scala

@@ -3,19 +3,8 @@
 package unittest
 
 import Chisel._
-import cde.Parameters
-import rocketchip._
 
-class TestHarness(implicit val p: Parameters) extends Module {
+class TestHarness(implicit val p: cde.Parameters) extends Module {
-  val io = new Bundle {
+  val io = new Bundle { val success = Bool(OUTPUT) }
-    val success = Bool(OUTPUT)
+  io.success := Module(new UnitTestSuite).io.finished
-  }
-
-  val l1params = p.alterPartial({
-    case NCoreplexExtClients => 0
-    case ConfigString => ""
-    case uncore.tilelink.TLId => "L1toL2" })
-  val tests = Module(new UnitTestSuite()(l1params))
-
-  io.success := tests.io.finished
 }

src/main/scala/unittest/UnitTest.scala

@@ -18,6 +18,7 @@ abstract class UnitTest extends Module with HasUnitTestIO {
 }
 
 case object UnitTests extends Field[Parameters => Seq[UnitTest]]
+case object UnitTestTimeout extends Field[Int]
 
 class UnitTestSuite(implicit p: Parameters) extends Module {
   val io = new Bundle {
@@ -39,7 +40,7 @@ class UnitTestSuite(implicit p: Parameters) extends Module {
     state := Mux(test_idx === UInt(tests.size - 1), s_done, s_start)
   }
 
-  val timer = Module(new Timer(500000, tests.size))
+  val timer = Module(new Timer(p(UnitTestTimeout), tests.size))
   timer.io.start.valid := Bool(false)
   timer.io.stop.valid := Bool(false)