fix TL -> Nasti converter w id
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2906c75167
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@ -108,7 +108,8 @@ class NastiIOTileLinkIOConverter(implicit p: Parameters) extends TLModule()(p)
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get_id_ready)
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get_id_ready)
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val w_inflight = Reg(init = Bool(false))
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val w_inflight = Reg(init = Bool(false))
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val w_id = Reg(init = UInt(0, nastiXIdBits))
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val w_id_reg = Reg(init = UInt(0, nastiXIdBits))
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val w_id = Mux(w_inflight, w_id_reg, put_id_mapper.io.req.out_id)
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// For Put/PutBlock, make sure aw and w channel are both ready before
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// For Put/PutBlock, make sure aw and w channel are both ready before
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// we send the first beat
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// we send the first beat
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@ -191,7 +192,7 @@ class NastiIOTileLinkIOConverter(implicit p: Parameters) extends TLModule()(p)
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when (!w_inflight && io.tl.acquire.fire() && is_multibeat) {
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when (!w_inflight && io.tl.acquire.fire() && is_multibeat) {
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w_inflight := Bool(true)
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w_inflight := Bool(true)
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w_id := put_id_mapper.io.req.out_id
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w_id_reg := w_id
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}
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}
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when (w_inflight) {
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when (w_inflight) {
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