riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

rocketchip: include devices from cbus in ConfigString

Browse Source
This commit is contained in:
Wesley W. Terpstra
2016-10-27 18:03:43 -07:00
parent b68bc449e7
commit 401fd378b4
3 changed files with 9 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/main/scala/coreplex/BaseCoreplex.scala
View File

@ -78,6 +78,12 @@ abstract class BareCoreplexBundle[+L <: BareCoreplex](val outer: L) extends Bund
abstract class BareCoreplexModule[+L <: BareCoreplex, +B <: BareCoreplexBundle[L]](val outer: L, val io: B) extends LazyModuleImp(outer) with HasCoreplexParameters {
implicit val p = outer.p
// Create and export the ConfigString
val managers = outer.l1tol2.node.edgesIn(0).manager.managers
val configString = rocketchip.GenerateConfigString(p, managers)
println(s"\nGenerated Configuration String\n${configString}")
ConfigStringOutput.contents = Some(configString)
// Build a set of Tiles
val tiles = outer.lazyTiles.map(_.module)
val uncoreTileIOs = (tiles zipWithIndex) map { case (tile, i) => Wire(tile.io) }