riscv/rocket-chip
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Move check on VCS inside riscv-fesvr

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This removes the necessary preprocessing of riscv-fesvr arguments to
avoid situations where riscv-fesvr thinks that an argument is the
binary. Support for this is rolled into riscv-fesvr.
This commit is contained in:
Schuyler Eldridge 2017-03-20 00:13:10 -04:00 committed by Megan Wachs
parent a97add954a
commit 3ead9a5d2d
1 changed files with 1 additions and 22 deletions
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23
csrc/SimDTM.cc
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@ -6,27 +6,6 @@
dtm_t* dtm;
namespace {
// Remove args that will confuse dtm, such as those that require two tokens, like VCS code coverage "-cm line+cond"
std::vector<std::string> filter_argv_for_dtm(int argc, char** argv)
{
std::vector<std::string> out;
for (int i = 1; i < argc; ++i) { // start with 1 to skip my executable name
if (!strncmp(argv[i], "-cm", 3)) {
++i; // skip this one and the next one
}
else {
out.push_back(argv[i]);
}
}
return out;
}
}
extern "C" int debug_tick
(
unsigned char* debug_req_valid,
@ -44,7 +23,7 @@ extern "C" int debug_tick
s_vpi_vlog_info info;
if (!vpi_get_vlog_info(&info))
abort();
dtm = new dtm_t(filter_argv_for_dtm(info.argc, info.argv));
dtm = new dtm_t(info.argc, info.argv);
}
dtm_t::resp resp_bits;