ShiftQueue: fix bug in !flow case
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@ -26,7 +26,7 @@ class ShiftQueue[T <: Data](gen: T,
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val wdata = if (i == entries-1) io.enq.bits else Mux(valid(i+1), elts(i+1), io.enq.bits)
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val wen =
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Mux(io.deq.ready,
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paddedValid(i+1) || io.enq.fire() && valid(i),
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paddedValid(i+1) || io.enq.fire() && (Bool(i == 0 && !flow) || valid(i)),
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io.enq.fire() && paddedValid(i-1) && !valid(i))
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when (wen) { elts(i) := wdata }
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