Add exception signal to rocc interface
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parent
30b894c2c4
commit
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@ -738,4 +738,5 @@ class Control(implicit conf: RocketConfiguration) extends Module
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io.dmem.req.bits.phys := Bool(false)
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io.dmem.req.bits.phys := Bool(false)
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io.rocc.cmd.valid := wb_rocc_val
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io.rocc.cmd.valid := wb_rocc_val
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io.rocc.exception := wb_reg_xcpt && sr.er
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}
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}
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@ -38,14 +38,17 @@ class RoCCInterface(implicit conf: RocketConfiguration) extends Bundle
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val cmd = Decoupled(new RoCCCommand).flip
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val cmd = Decoupled(new RoCCCommand).flip
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val resp = Decoupled(new RoCCResponse)
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val resp = Decoupled(new RoCCResponse)
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val mem = new HellaCacheIO()(conf.dcache)
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val mem = new HellaCacheIO()(conf.dcache)
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val busy = Bool(OUTPUT)
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val interrupt = Bool(OUTPUT)
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// These should be handled differently, eventually
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val imem = new UncachedTileLinkIO()(conf.tl)
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val imem = new UncachedTileLinkIO()(conf.tl)
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val iptw = new TLBPTWIO
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val iptw = new TLBPTWIO
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val dptw = new TLBPTWIO
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val dptw = new TLBPTWIO
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val pptw = new TLBPTWIO
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val pptw = new TLBPTWIO
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val cp_dfma = new ioFMA(65).flip
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val cp_dfma = new ioFMA(65).flip
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val cp_sfma = new ioFMA(33).flip
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val cp_sfma = new ioFMA(33).flip
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val busy = Bool(OUTPUT)
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val exception = Bool(INPUT)
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val interrupt = Bool(OUTPUT)
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override def clone = new RoCCInterface().asInstanceOf[this.type]
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override def clone = new RoCCInterface().asInstanceOf[this.type]
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}
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}
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