riscv/rocket-chip
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normalize rocket-chip to reference-chip

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This commit is contained in:
Yunsup Lee 2014-09-25 06:45:09 -07:00
parent 6495d0e6f7
commit 3b9624277a
1 changed files with 5 additions and 2 deletions
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5
project/build.scala
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@ -37,11 +37,14 @@ object BuildSettings extends Build {
val blacklist = (baselist ++ Vector("target", "project"))
IO.listFiles(file(".")) map (_.toString.split("/").last) filter (f=> !blacklist.contains(f)) filter (f=> !IO.listFiles(file(f+"/src/main/scala")).isEmpty)
}
// def buildsubproj(sproj: String) = Project(sproj, file(sproj), settings = buildSettings).dependsOn(chisel, uncore, rocket, hardfloat)
// val subprojs = (getsubprojs map (sproj=>buildsubproj(sproj)))
// unfortunately, creating projects on the fly doesn't seem to quite work in sbt
val othersources = getsubdirs map (f=>s"${f}/src/main/scala") map (f=>file(f))
val addOtherFiles = Seq (
unmanagedSourceDirectories in Compile ++= othersources.toSeq
) // aggregate extra sources into rocketchip
) // so instead, for dynamically expanding projects, just compile them all at once with rocket chip
lazy val rocketchip = Project("rocketchip", file("."), settings = buildSettings ++ chipSettings ++ addOtherFiles).dependsOn(chisel, hardfloat, uncore, rocket)