riscv/rocket-chip
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Cope with changes to AddrMap

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This commit is contained in:
Andrew Waterman 2016-06-03 13:50:29 -07:00
parent 13386af1d1
commit 3b0c1ed0c3
2 changed files with 2 additions and 2 deletions
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2
rocket/src/main/scala/csr.scala
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@ -8,7 +8,7 @@ import Instructions._
import cde.{Parameters, Field}
import uncore._
import scala.math._
import junctions.AddrHashMap
import junctions.AddrMap
class MStatus extends Bundle {
val debug = Bool() // not truly part of mstatus, but convenient

2
rocket/src/main/scala/dma.scala
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@ -3,7 +3,7 @@ package rocket
import Chisel._
import uncore._
import uncore.DmaRequest._
import junctions.{ParameterizedBundle, AddrHashMap}
import junctions.{ParameterizedBundle, AddrMap}
import cde.Parameters
trait HasClientDmaParameters extends HasCoreParameters with HasDmaParameters {