riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

Update README.md (#161)

Browse Source 
Correct typo in heading
This commit is contained in:
mwachs5 2016-07-11 00:34:13 -07:00 committed by Andrew Waterman
parent 9751ea0f35
commit 36720d915a
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
README.md
View File

@ -202,7 +202,7 @@ The torture test code is used to generate randomized instruction streams which
are then run as code on the rocket core(s). These are constrained random tests are then run as code on the rocket core(s). These are constrained random tests
to stress-test both the core and uncore portions of the design. to stress-test both the core and uncore portions of the design.
### <a name="what_toplevel"></a>The Submodules ### <a name="what_toplevel"></a>The Top Level Module
Next, take a look at rocket-chip's src/main/scala directory. Next, take a look at rocket-chip's src/main/scala directory.
This directory has the Chisel source files including the top level This directory has the Chisel source files including the top level