Filled out 4 state coherence functions for cache
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@@ -605,8 +605,6 @@ abstract class HellaCache extends Component {
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def newStateOnWriteback(): UFix
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def newStateOnFlush(): UFix
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def newStateOnHit(cmd: Bits, state: UFix): UFix
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def newStateOnPrimaryMiss(cmd: Bits): UFix
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def newStateOnSecondaryMiss(cmd: Bits, state: UFix): UFix
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}
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class HellaCacheUniproc extends HellaCache with ThreeStateIncoherence {
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