riscv/rocket-chip
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Fix whitespace error

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Andrew Waterman 2017-04-13 17:51:19 -07:00 committed by Andrew Waterman
parent fdfcffb0b2
commit 34d45b4fb0
1 changed files with 1 additions and 1 deletions
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src/main/scala/tile/FPU.scala
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@ -211,7 +211,7 @@ case class FType(exp: Int, sig: Int) {
def isSNaN(x: UInt) = isNaN(x) && !x(sig - 2)
// convert between formats, ignoring rounding, range, NaN
def unsafeConvert(x: UInt, to: FType) = if (this == to) x else {
def unsafeConvert(x: UInt, to: FType) = if (this == to) x else {
val sign = x(sig + exp)
val fractIn = x(sig - 2, 0)
val expIn = x(sig + exp - 1, sig - 1)