riscv/rocket-chip
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Avoid width warning

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Andrew Waterman
2017-08-08 20:57:31 -07:00
parent 8705b0e070
commit 31b75987ca
1 changed files with 1 additions and 1 deletions
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scripts/vlsi_mem_gen
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@@ -104,8 +104,8 @@ def gen_mem(name, width, depth, mask_gran, mask_seg, ports):
combinational.append('`ifdef RANDOMIZE_MEM_INIT') combinational.append('`ifdef RANDOMIZE_MEM_INIT')
combinational.append(' initial begin') combinational.append(' initial begin')
combinational.append(' #0.002 begin end') combinational.append(' #0.002 begin end')
combinational.append(' reg_%sren = $random;' % prefix)
combinational.append(' %srandom = {%s};' % (prefix, ', '.join(['$random'] * ((width-1)//32+1)))) combinational.append(' %srandom = {%s};' % (prefix, ', '.join(['$random'] * ((width-1)//32+1))))
combinational.append(' reg_%sren = %srandom[0];' % (prefix, prefix))
combinational.append(' end') combinational.append(' end')
combinational.append('`endif') combinational.append('`endif')
combinational.append('always @(posedge %sclk) %srandom <= {%s};' % (prefix, prefix, ', '.join(['$random'] * ((width-1)//32+1)))) combinational.append('always @(posedge %sclk) %srandom <= {%s};' % (prefix, prefix, ', '.join(['$random'] * ((width-1)//32+1))))