riscv/rocket-chip
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[rocket] bugfix: fixes #517

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Henry Cook committed 2017-01-19 17:48:04 -08:00
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commit 307f938b88
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src/main/scala/coreplex/RocketTiles.scala
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@@ -49,6 +49,7 @@ trait HasSynchronousRocketTilesModule extends CoreplexRISCVPlatformModule {
trait HasAsynchronousRocketTiles extends CoreplexRISCVPlatform {
val module: HasAsynchronousRocketTilesModule
import rocket.AsyncRocketTile
val rocketTiles: Seq[AsyncRocketTile] = p(RocketConfigs).map { c =>
LazyModule(new AsyncRocketTile(c)(p.alterPartial {
case SharedMemoryTLEdge => l1tol2.node.edgesIn(0)