riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

make external address map order overrideable

Browse Source
This commit is contained in:
Howard Mao 2016-08-15 11:40:28 -07:00
parent fb476d193c
commit 2c39f039b5
2 changed files with 4 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/main/scala/Configs.scala
View File

@ -28,8 +28,7 @@ class BasePlatformConfig extends Config (
new AddrMap(entries) new AddrMap(entries)
} }
lazy val externalAddrMap = new AddrMap( lazy val externalAddrMap = new AddrMap(
site(ExtraDevices).map(_.addrMapEntry) ++ site(ExtIOAddrMapEntries),
site(ExtMMIOPorts),
start = BigInt("50000000", 16), start = BigInt("50000000", 16),
collapse = true) collapse = true)
lazy val globalAddrMap = { lazy val globalAddrMap = {
@ -126,6 +125,8 @@ class BasePlatformConfig extends Config (
case ExtraDevices => Nil case ExtraDevices => Nil
case ExtraTopPorts => (p: Parameters) => new Bundle case ExtraTopPorts => (p: Parameters) => new Bundle
case ExtMMIOPorts => Nil case ExtMMIOPorts => Nil
case ExtIOAddrMapEntries =>
site(ExtraDevices).map(_.addrMapEntry) ++ site(ExtMMIOPorts)
case NExtMMIOAXIChannels => 0 case NExtMMIOAXIChannels => 0
case NExtMMIOAHBChannels => 0 case NExtMMIOAHBChannels => 0
case NExtMMIOTLChannels => 0 case NExtMMIOTLChannels => 0

1
src/main/scala/RocketChip.scala
View File

@ -38,6 +38,7 @@ case object AsyncMemChannels extends Field[Boolean]
case object AsyncMMIOChannels extends Field[Boolean] case object AsyncMMIOChannels extends Field[Boolean]
/** External address map settings */ /** External address map settings */
case object ExtMMIOPorts extends Field[Seq[AddrMapEntry]] case object ExtMMIOPorts extends Field[Seq[AddrMapEntry]]
case object ExtIOAddrMapEntries extends Field[Seq[AddrMapEntry]]
/** Function for building Coreplex */ /** Function for building Coreplex */
case object BuildCoreplex extends Field[Parameters => Coreplex] case object BuildCoreplex extends Field[Parameters => Coreplex]
/** Function for connecting coreplex extra ports to top-level extra ports */ /** Function for connecting coreplex extra ports to top-level extra ports */