riscv/rocket-chip
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fixed typo that broke illegal instruction exception

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Rimas Avizienis 2011-11-13 01:17:33 -08:00
parent 7b3c34a341
commit 29d44b8bc5
1 changed files with 1 additions and 1 deletions
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rocket/src/main/scala/ctrl.scala
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@ -367,7 +367,7 @@ class rocketCtrl extends Component
mem_reg_xcpt_ma_inst <== ex_reg_xcpt_ma_inst; mem_reg_xcpt_ma_inst <== ex_reg_xcpt_ma_inst;
mem_reg_xcpt_itlb <== ex_reg_xcpt_itlb; mem_reg_xcpt_itlb <== ex_reg_xcpt_itlb;
mem_reg_xcpt_illegal <== mem_reg_xcpt_illegal; mem_reg_xcpt_illegal <== ex_reg_xcpt_illegal;
mem_reg_xcpt_privileged <== ex_reg_xcpt_privileged; mem_reg_xcpt_privileged <== ex_reg_xcpt_privileged;
// mem_reg_xcpt_fpu <== Bool(false); // mem_reg_xcpt_fpu <== Bool(false);
mem_reg_xcpt_syscall <== ex_reg_xcpt_syscall; mem_reg_xcpt_syscall <== ex_reg_xcpt_syscall;