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tilelink2 Parameters: fix width=1 address truncation bug

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Wesley W. Terpstra 2016-09-10 01:22:12 -07:00
parent 98a4facac7
commit 26f9e2dfbd
1 changed files with 1 additions and 1 deletions
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src/main/scala/uncore/tilelink2/Parameters.scala
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@ -322,7 +322,7 @@ case class TLEdgeParameters(
require (maxTransfer >= manager.beatBytes) require (maxTransfer >= manager.beatBytes)
val bundle = TLBundleParameters( val bundle = TLBundleParameters(
addrHiBits = log2Up(manager.maxAddress + 1) - log2Up(manager.beatBytes), addrHiBits = log2Up(manager.maxAddress + 1) - log2Ceil(manager.beatBytes),
dataBits = manager.beatBytes * 8, dataBits = manager.beatBytes * 8,
sourceBits = log2Up(client.endSourceId), sourceBits = log2Up(client.endSourceId),
sinkBits = log2Up(manager.endSinkId), sinkBits = log2Up(manager.endSinkId),