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tilelink2 IntNodes: support interrupt graphs

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Wesley W. Terpstra
2016-09-08 11:30:35 -07:00
parent d7df7d3109
commit 23e896ed5d
2 changed files with 73 additions and 0 deletions
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src/main/scala/uncore/tilelink2/package.scala
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@ -5,6 +5,7 @@ import Chisel._
package object tilelink2
{
type TLBaseNode = BaseNode[TLClientPortParameters, TLManagerPortParameters, TLEdgeOut, TLEdgeIn, TLBundle]
type IntBaseNode = BaseNode[IntSourcePortParameters, IntSinkPortParameters, IntEdge, IntEdge, Vec[Bool]]
def OH1ToUInt(x: UInt) = OHToUInt((x << 1 | UInt(1)) ^ x)
def UIntToOH1(x: UInt, width: Int) = ~(SInt(-1, width=width).asUInt << x)(width-1, 0)
def trailingZeros(x: Int) = if (x > 0) Some(log2Ceil(x & -x)) else None