riscv/rocket-chip
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directly integrate dramsim build

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also, build it as a static library to simplify dependencies
This commit is contained in:
Andrew Waterman 2012-10-18 18:59:37 -07:00
parent edf0eeed01
commit 1ad928cfe2
3 changed files with 15 additions and 20 deletions
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8
README
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@ -26,19 +26,11 @@ BUILDING THE TOOLCHAIN:
cd riscv-asmtests-bmarks/riscv-bmarks/ cd riscv-asmtests-bmarks/riscv-bmarks/
make make
To build dramsim2 (tagged version 2.1):
cd dramsim2/
git checkout v2.1
make libdramsim.so
BUILDING THE PROJECT: BUILDING THE PROJECT:
To build the C simulator: To build the C simulator:
cd emulator cd emulator
make dramsim2 (if DRAMSim2 is not installed and in your path)
make make
To build the VCS simulator: To build the VCS simulator:

1
emulator/.gitignore vendored
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@ -1,5 +1,6 @@
*~ *~
*.o *.o
*.a
*.out *.out
*.vcd *.vcd
*.vpd *.vpd

26
emulator/Makefile
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@ -7,17 +7,16 @@ CXXFLAGS := -O1
all: emulator all: emulator
CXXSRCS := emulator disasm CXXSRCS := emulator disasm
CXXFLAGS := $(CXXFLAGS) -Itestbench -I$(basedir)/chisel/csrc CXXFLAGS := $(CXXFLAGS) -Itestbench -I$(basedir)/chisel/csrc -I../dramsim2
DRAMSIM2_PATH := ../dramsim2/ OBJS := $(addsuffix .o,$(CXXSRCS) $(MODEL))
CXXFLAGS := $(CXXFLAGS) -I$(DRAMSIM2_PATH) -L$(DRAMSIM2_PATH) -ldramsim -Wl,-rpath=$(DRAMSIM2_PATH) DEBUG_OBJS := $(addsuffix -debug.o,$(CXXSRCS) $(MODEL))
DRAMSIM2_LIB := libdramsim.so
generated-src/$(MODEL).cpp: $(basedir)/riscv-rocket/src/*.scala $(basedir)/riscv-hwacha/src/*.scala $(basedir)/chisel/src/main/scala/* $(basedir)/uncore/src/*.scala generated-src/$(MODEL).cpp: $(basedir)/riscv-rocket/src/*.scala $(basedir)/riscv-hwacha/src/*.scala $(basedir)/chisel/src/main/scala/* $(basedir)/uncore/src/*.scala
cd $(basedir)/sbt && $(SBT) "project referencechip" "run ReferenceChip.Top --backend c --noIoDebug --targetDir ../emulator/generated-src" cd $(basedir)/sbt && $(SBT) "project referencechip" "run ReferenceChip.$(MODEL) --backend c --noIoDebug --targetDir ../emulator/generated-src"
generated-src-debug/$(MODEL).cpp: $(basedir)/riscv-rocket/src/*.scala $(basedir)/riscv-hwacha/src/*.scala $(basedir)/chisel/src/main/scala/* $(basedir)/uncore/src/*.scala generated-src-debug/$(MODEL).cpp: $(basedir)/riscv-rocket/src/*.scala $(basedir)/riscv-hwacha/src/*.scala $(basedir)/chisel/src/main/scala/* $(basedir)/uncore/src/*.scala
cd $(basedir)/sbt && $(SBT) "project referencechip" "run ReferenceChip.Top --backend c --debug --vcd --targetDir ../emulator/generated-src-debug" cd $(basedir)/sbt && $(SBT) "project referencechip" "run ReferenceChip.$(MODEL) --backend c --debug --vcd --targetDir ../emulator/generated-src-debug"
$(MODEL).o: %.o: generated-src/%.cpp $(MODEL).o: %.o: generated-src/%.cpp
$(CXX) $(CXXFLAGS) -Igenerated-src -c -o $@ $< $(CXX) $(CXXFLAGS) -Igenerated-src -c -o $@ $<
@ -31,14 +30,17 @@ $(addsuffix .o,$(CXXSRCS)): %.o: testbench/%.cc testbench/* generated-src/$(MODE
$(addsuffix -debug.o,$(CXXSRCS)): %-debug.o: testbench/%.cc testbench/* generated-src-debug/$(MODEL).cpp $(addsuffix -debug.o,$(CXXSRCS)): %-debug.o: testbench/%.cc testbench/* generated-src-debug/$(MODEL).cpp
$(CXX) $(CXXFLAGS) -Igenerated-src-debug -c -o $@ $< $(CXX) $(CXXFLAGS) -Igenerated-src-debug -c -o $@ $<
emulator: $(addsuffix .o,$(CXXSRCS)) $(MODEL).o DRAMSIM_OBJS := $(patsubst %.cpp,%.o,$(wildcard ../dramsim2/*.cpp))
$(CXX) $(CXXFLAGS) -o $@ $^ $(DRAMSIM_OBJS): %.o: %.cpp
$(CXX) $(CXXFLAGS) -DNO_STORAGE -Dmain=nomain -c -o $@ $<
libdramsim.a: $(DRAMSIM_OBJS)
ar rcs $@ $^
emulator-debug: $(addsuffix -debug.o,$(CXXSRCS)) $(MODEL)-debug.o emulator: $(OBJS) libdramsim.a
$(CXX) $(CXXFLAGS) -o $@ $^ $(CXX) $(CXXFLAGS) -o $@ $(OBJS) -L. -ldramsim
dramsim2: emulator-debug: $(DEBUG_OBJS) libdramsim.a
cd $(DRAMSIM2_PATH) ; make $(DRAMSIM2_LIB) $(CXX) $(CXXFLAGS) -o $@ $(DEBUG_OBJS) -L. -ldramsim
all: emulator all: emulator