Expanded front-end to support superscalar fetch.

This commit is contained in:
Christopher Celio committed 2014-09-17 14:24:03 -07:00
1 parent 238f7761f6
commit 180d3d365d
4 files changed
+35 -10

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@@ -47,9 +47,9 @@ class Datapath extends Module
val wb_reg_rs2 = Reg(Bits())
// instruction decode stage
val id_inst = io.imem.resp.bits.data
val id_inst = io.imem.resp.bits.data(0).toBits; require(params(FetchWidth) == 1)
val id_pc = io.imem.resp.bits.pc
class RegFile {
private val rf = Mem(UInt(width = 64), 31)
private val reads = collection.mutable.ArrayBuffer[(UInt,UInt)]()