riscv/rocket-chip
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add vec countq interface

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Yunsup Lee
2012-03-02 00:43:32 -08:00
parent 8678b3d70c
commit 1054cec087
6 changed files with 18 additions and 5 deletions
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5
rocket/src/main/scala/consts.scala
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@ -144,8 +144,9 @@ object Constants
val PCR_VECBANK = UFix(18, 5);
// temporaries for vector, these will go away
val PCR_VEC_TMP1 = UFix(30, 5)
val PCR_VEC_TMP2 = UFix(31, 5)
val PCR_VEC_CNT = UFix(29, 5)
val PCR_VEC_EADDR = UFix(30, 5)
val PCR_VEC_XCPT = UFix(31, 5)
// definition of bits in PCR status reg
val SR_ET = 0; // enable traps