riscv/rocket-chip
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new mftx instruction format

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This commit is contained in:
Yunsup Lee 2011-12-12 03:23:12 -08:00
parent 8308345364
commit 0ea2704b80
1 changed files with 2 additions and 2 deletions
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4
rocket/src/main/scala/instructions.scala
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@ -146,8 +146,8 @@ object Instructions
val FMAX_S = Bits("b?????_?????_?????_11001_000_00_1010011",32);
val FMIN_D = Bits("b?????_?????_?????_11000_000_01_1010011",32);
val FMAX_D = Bits("b?????_?????_?????_11001_000_01_1010011",32);
val MFTX_S = Bits("b?????_00000_?????_11100_000_00_1010011",32);
val MFTX_D = Bits("b?????_00000_?????_11100_000_01_1010011",32);
val MFTX_S = Bits("b?????_?????_00000_11100_000_00_1010011",32);
val MFTX_D = Bits("b?????_?????_00000_11100_000_01_1010011",32);
val MFFSR = Bits("b?????_00000_00000_11101_000_00_1010011",32);
val MXTF_S = Bits("b?????_?????_00000_11110_000_00_1010011",32);
val MXTF_D = Bits("b?????_?????_00000_11110_000_01_1010011",32);