bugfix where an in-progress acquire can be blocked by another acquire tracker being free'd up in between
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@ -364,23 +364,28 @@ class TSHRFile(bankId: Int) extends L2HellaCacheModule
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(trackerList.map(_.io.incoherent) :+ wb.io.incoherent).map( _ := io.incoherent.toBits)
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// Handle acquire transaction initiation
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val trackerAcquireIOs = trackerList.map(_.io.inner.acquire)
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val alloc_arb = Module(new Arbiter(Bool(), trackerList.size))
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val trackerAcquireIOs = trackerList.map(_.io.inner.acquire)
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alloc_arb.io.out.ready := Bool(true)
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trackerAcquireIOs.zip(alloc_arb.io.in).foreach {
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case(tracker, arb) =>
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arb.valid := tracker.ready
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}
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val alloc_idx = Vec(alloc_arb.io.in.map(_.ready)).lastIndexWhere{b: Bool => b}
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val acquireMatchList = trackerList.map(_.io.has_acquire_match)
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val any_acquire_matches = acquireMatchList.reduce(_||_)
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val alloc_idx = Vec(alloc_arb.io.in.map(_.ready)).lastIndexWhere{b: Bool => b}
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val match_idx = Vec(acquireMatchList).indexWhere{b: Bool => b}
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val acquire_idx = Mux(any_acquire_matches, match_idx, alloc_idx)
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trackerAcquireIOs.zip(alloc_arb.io.in).zipWithIndex.foreach {
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case((tracker, arb), i) =>
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arb.valid := tracker.ready
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tracker.bits := io.inner.acquire.bits
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tracker.valid := arb.ready && (acquire_idx === UInt(i))
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}
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val block_acquires = trackerList.map(_.io.has_acquire_conflict).reduce(_||_)
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io.inner.acquire.ready := trackerAcquireIOs.map(_.ready).reduce(_||_) &&
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!block_acquires
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alloc_arb.io.out.ready := io.inner.acquire.valid && !block_acquires
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io.inner.acquire.ready := trackerAcquireIOs.map(_.ready).reduce(_||_) && !block_acquires
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trackerAcquireIOs.zipWithIndex.foreach {
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case(tracker, i) =>
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tracker.bits := io.inner.acquire.bits
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tracker.valid := io.inner.acquire.valid && !block_acquires && (acquire_idx === UInt(i))
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}
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// Wire releases from clients
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val release_idx = Vec(trackerList.map(_.io.has_release_match) :+
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