Update trace generation and checking scripts
Pass the elf file (that specifies the tohost and fromhost addresses) to the emulator in the trace generator & checker scripts.
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@ -186,8 +186,9 @@ class TraceGenerator(id: Int)
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// In addition, there is a per-core random selection of extra addresses.
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val addrHashMap = p(GlobalAddrHashMap)
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val memStart = addrHashMap("mem").start
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val bagOfAddrs = addressBag.map(x => UInt(memStart + x, numBitsInWord))
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val baseAddr = addrHashMap("mem").start + 0x01000000
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val bagOfAddrs = addressBag.map(x => UInt(x, numBitsInWord))
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val extraAddrs = (0 to numExtraAddrs-1).
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map(i => Reg(UInt(width = 16)))
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@ -467,7 +468,7 @@ class TraceGenerator(id: Int)
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// Wire up interface to memory
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io.mem.req.valid := reqValid
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io.mem.req.bits.addr := reqAddr
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io.mem.req.bits.addr := reqAddr + UInt(baseAddr)
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io.mem.req.bits.data := reqData
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io.mem.req.bits.typ := MT_D
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io.mem.req.bits.cmd := reqCmd
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